• Citizen

• Full Time

• Direct Hire

• UG :- - Not Required

• PG :- - Not Required

• No of position :- ( 1 )

• Post :- 22nd Aug 2022

Roles and Responsibilities:

• Must have experience in FPGA Design for RTL Coding and Hardware Design.
• Should work in RTL Coding Development in languages like Verilog, VHDL & System Verilog
• Have experience in CPLD, High speed, Xilinx, Xilinx ISE, Altera.
• Must have experience in hardware board design engineer for system level designs, Board level block diagram design and validation of hardware.
• Experience in FPGA design tools - Xilinx ISE / EDK / SDK, Altera Quartus, Lattice ISP, Matlab & Simulink