• Citizen

• Full Time

• Direct Hire

• UG :- - Not Required

• PG :- - Not Required

• No of position :- ( 1 )

• Post :- 10th Nov 2022

HI,

Greetings from Mirafra Technologies

Trust doing good!!

With reference to your Naukri Profile, I would like to inform you that we have

Openings for you @ Mirafra, Bangalore/ODC

Please share cv with below details:-

Relevant Experience in PV:

Current C.T.C:

Exp C.T.C:

Notice Period:

Current Location:

Preferred Locations :

Experience- 4- 20 years

Sponsorship of H1B for the year 2023.

Location- Bangalore / ODC

Notice period: Immediate to 90 days

(Special Note: H1B Aspirants, we will file H1B on 2023 for candidates having more than 7 years of experience.)

Job description for this position -

 Physical Verification 

The candidate should have good experience in editing layouts in Cadence and fixing DRC's in 28nm. He will be responsible for SOC level PV closure for 2nd source tapeouts and should have good knowledge of all PV tasks like LVS/ERC other than 28nm DRC. 

Having memory layout experience is a plus for this role but not must. 

Candidate should be self driven and should be able to communicate well with SOC team and external IP teams to get issues to closure during base and metal tapeout cycles. 

Ideal candidate should have 4-7 years experience in layout editing and PV closure at least at IP level.have working knowledge of one of the scripting languages PERLTCL,SHELL,Cadence skill.

We can have a quick discussion regarding the opportunity. Feel free to reach me or whatsapp at +91 - 7609884597.