• Citizen

• Full Time

• Direct Hire

• UG :- - Not Required

• PG :- - Not Required

• No of position :- ( 1 )

• Post :- 11th Oct 2022

SMTS/ Principal FPGA Design Engineer in Bengaluru/ Bangalore, for Exp 10+ yrs SMTS/ Principal FPGA Design Engineer

10+ years Graduate Degree in Electrical/ Electronics Engg. (post Graduate degree is a plus)

Bengaluru/ Bangalore Job Description

•10+ years of FPGA Design and Debug experience (preferably with Xilinx Ultrascale+ and Virtex7)

•Proficiency in using Xilinx Vivado/ Coregen/ Synplify and development/ maintenance of Timing/ IO constraints (UCF)

•Experience with multiple high speed clock domains

•Experience with integration of third- party IP (PCIe controller, Serdes PCS) onto Xilinx transceivers

•Experience working with FMC daughter- cards, High- Speed Cables/ Connectors etc.

•Extensive debug experience using Xilinx ILA and Protocol Analyzers, Oscilloscope, Logic Analyzers etc.

•Proficiency in PERL/ TCL scripting

•Database management between FPGA and ASIC RTL

•Familiarity with front- end RTL tools (RTL Simulation, Synthesis, DFT, Timing)

•RTL Design modification/ adaptation for FPGA implementation (memories, IO, clocking etc. )

•Design optimization to achieve FPGA area/ performance goals

•Work closely with DV and Firmware/ Software teams during the entire validation process; including post- silicon bring- up Responsibilities

•Be able to work and communicate with multi- site teams

•Responsible for the review of FPGA netlist releases (block/ chip)

•ASIC product life cycle experience (requirements, design, implementation, test and post- silicon validation)