Required Skills

FPGA Digital design Mixed signal RTL coding Verilog Ethernet

Work Authorization

  • Citizen

Preferred Employment

  • Full Time

Employment Type

  • Direct Hire

education qualification

  • UG :- - Not Required

  • PG :- - Not Required

Other Information

  • No of position :- ( 1 )

  • Post :- 11th Oct 2022

JOB DETAIL

Digital Design Engineer/ Senior Digital Design Engineer (Multiple positions) Digital Design Engineer/ Senior Digital Design Engineer (Multiple positions) in Bengaluru/ Bangalore, for Exp 5- 10 yrs Digital Design Engineer/ Senior Digital Design Engineer (Multiple positions)

5- 10 years Minimum BE/ BS degree in Electrical/ Electronics/ Computer science required

Bengaluru/ Bangalore Job Description

•Minimum BE/ BS degree in Electrical/ Electronics/ Computer science required.

•At least 5- 10 years of logic design and RTL coding experience with sound knowledge on verification and implementation concepts.

•Experience in physical layer ASIC architecture, micro- architecture development, design and debug.

•Ability to code readable, maintainable, verifiable and synthesizable logic in Verilog and/ or SystemVerilog.

•Experience with lint, synthesis, CDC, STA, formality, ECO process, tool flows and scripting.

•Knowledge in one or more of the following areas, a definite plus.

•Ethernet (layer 2/ 3/ 4 protocols, GMII/ XGMII, integration of PHY layer).

•DSP fundamentals/ Filter/ FFT design/ Datapath design/ Error Control Coding.

•Computer architecture/ Processor fundamentals. Preferred Qualifications

•Strong knowledge of ASIC design methodologies and flows.

•Ability to proactively take on responsibilities and competent to work in a start- up environment.

•Worked with product development companies and having seen at least a couple of tape- outs.

•Experience with silicon bring- up in the lab and debugging is a definite plus.

•Experience with FPGA realizations of higher complexity designs.

•Ability to work with teams spread across geography with excellent communication skills. Responsibilities

•Develop key blocks of logic in a next generation physical layer/ mixed signal SOCs.

•Perform hardware feasibility analysis and come up with a micro- architecture specification helping it map to a high performance, implementable design.

•Work with verification, DFT, synthesis, circuits, backend implementation teams to realize quality implementation. Apply

 

Company Information