• Citizen

• Full Time

• Direct Hire

• UG :- - Not Required

• PG :- - Not Required

• No of position :- ( 1 )

• Post :- 19th Jul 2022

Qualifications - External

• B.E/M.E/M.Tech or B.S/M.S in EE/CE with 2+ years of relevant experience

• 2+ years of experience in designing complex blocks of an SoC

• Excellent Verilog and logic design concepts

• Experience with sign off tools like DC/PT

• Experience with automation using scripting techniques such as PERL, Python or TCL

• Knowledge of bus protocols like AXI/AHB

• Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, and ModelSim.

• Excellent communication and problem solving skills.

• Should have experience working in geographically dispersed team and should be a strong team player