Come join the HDL Verifier product development team, and apply your talents and experience to provide customers with cutting edge verification solutions for FPGA and ASIC implementations. You will use MATLAB and Simulink to develop & test features related to verification and debugging on FPGA/SoC platforms. You will be able to avail of opportunities to develop your communication, presentation and leadership skills.
Responsibilities
- Develop new features that enable the verification of FPGA design using MATLAB or Simulink
- Create prototypes that accelerates the hardware verification using MATLAB or Simulink by leveraging the cutting-edge FPGA/SoC technologies
- Integrate the latest FPGA/SoC boards and devices into existing automated workflows for verification
- Implement automated hardware test for the latest HDL Verifier features
- Build eye-catching demos for our products
Minimum Qualifications
- A bachelor's degree and 5 years of professional work experience (or a master's degree, or equivalent experience) is required.
Additional Qualifications
- Experience with FPGA implementation, testing, or verification
- Experience with MATLAB or Simulink
- Experience programming in C or C++
- Experience developing host computer device drivers, such as PCIe, JTAG, and USB, that integrate FPGAs, ASIC, or embedded processors with host applications, is a plus
- Experience with hardware-in-the-loop with FPGAs, ASIC, processors is a plus
- Experience with HDL simulators, such as Mentor Graphics ModelSim and Synopsys Discovery, is a plus
- Experience with verification languages or verification methodologies, such as SystemC, SystemVerilog, TLM, or OVM/UVM, is a plus
Interested candidates can share their updated profile to keshavk@mathworks.com