The candidate would lead the implementation of the architecture and design of memory technologies such as SRAM, Register Files, ROM generators, etc.
Key Requirements
- Fundamental know-how of bit cell and its characteristics (SNM, WM, Cell current, Standby current, data retention, etc.)
- Expertise in process variability and circuit reliability issues that affect power, speed, area, and yield
- Strong understanding of custom circuit design and layout in finFET-based CMOS technologies
- Expertise in critical path modeling using different models (RC, C, Pi, ladder, distributive, etc.)
- Comfortable with scripting languages such as Python or Perl, and the UNIX operating system
- Demonstrated technical leadership skills
- Good knowledge of semiconductor physics. Knowledge of and affinity to IC technology and IP design is mandatory.