Verification IP Development Engineers: 5-10 Years of Experience
Qualifications
- Bachelors or masters degree in Electronics or related concentration
Experience
- 5-10 years of Industry Experience on live projects
Must Have skills (Technical + Behavioral)
- Methodology: UVM
- Languages: System Verilog
- Verification knowledge is must. Person should have worked on UVM based design verification
- Should have expertise in development of Design Verification IP (VIP) for DDR OR AXI OR PCIe OR CXL OR Ethernet
- >7Y Person should have lead a team of ~5 member team for technical side of project
- Good oral and written communication skills. This job requires the ability to work effectively within diverse teams.
Good to Have skills (Technical + Behavioral)
- Knowledge of the Perl Scripting language
- Intel project experience
NP: Immediate to 30 Days
Location : Pune